Juniper Networks M7I - Manual (Page 18)

ATM2 E3 IQ PIC (M7i Router)
• Junos OS Release 6.1 and later Software release
• Two E3 ports
• Power requirement: 0.41 A @ 48 V (20 W)
• Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface
• ATM standards compliant
Description
• 16-MB SDRAM memory for ATM segmentation and reassembly (SAR)
• ATM switch ID
• Configurable framing options:
• G.751 direct mapping
• G.751 with PLCP encapsulation (default)
• G.832 ATM direct mapping
• Internal and loop timing
Hardware features
• Per-virtual circuit (VC) and per-virtual path (VP) traffic shaping
• Unspecified bit rate (UBR) traffic shaping
• Fine-grained variable bit rate (VBR) traffic shaping
• Circuit cross-connect (CCC)
• ATM Inverse Address Resolution Protocol (ARP), which enables routers to automatically learn
the IP address of the router on the far end of an ATM permanent virtual circuit (PVC)
• Simple Network Management Protocol (SNMP):
• Management Information Base (MIB) 2 (RFC 1213)
• ATM MIB (RFC 1695)
• SONET MIB
• AAL5 encapsulations:
• ATM-VC-MUX
• ATM-NLPID
• ATM-Cisco-LLPID
• ATM-SNAP
• ATM-CCC-VC-MUX
Software features
Copyright © 2010, Juniper Networks, Inc. 18
M7i Multiservice Edge Router PIC Guide