1 load immediate data to a register, 2 load or store data from or to a constant address – Jameco Electronics Rabbit 3000 User Manual

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User’s Manual

33

Input/output instructions are now accomplished by normal memory access instructions
prefixed by an op code byte to indicate access to an I/O space. There are two I/O
spaces, internal peripherals and external I/O devices.

Some Z80 and Z180 instructions have been deleted and are not supported by the Rabbit
(see Chapter 20, “Differences Rabbit vs. Z80/Z180 Instructions”). Most of the deleted
instructions are obsolete or are little-used instructions that can be emulated by several
Rabbit instructions. It was necessary to remove some instructions to free up 1-byte op
codes needed to implement new instructions efficiently. The instructions were not re-
implemented as 2-byte op codes so as not to waste on-chip resources on unimportant
instructions. Except for the instruction

EX (SP),HL

, the original Z180 binary encoding

of op codes is retained for all Z180 instructions that are retained.

3.3.1 Load Immediate Data to a Register

A constant that follows the op code in the instruction stream can generally be loaded to
any register, except PC, IP, and F. (Load to the PC is a jump instruction.) This includes the
alternate registers on the Rabbit, but not on the Z180. Some example instructions appear
below.

LD A,3

LD HL,456

LD BC',3567 ; not possible on Z180

LD H',0x4A ; not possible on Z180

LD IX,1234

LD C,54

Byte loads require four clocks, word loads require six clocks. Loads to IX, IY or the alter-
nate registers generally require two extra clocks because the op code has a 1-byte prefix.

3.3.2 Load or Store Data from or to a Constant Address

LD A,(mn) ; loads 8 bits from address mn

LD A',(mn) ; not possible on Z180

LD (mn),A

LD HL,(mn)

; load 16 bits from the address specified by mn

LD HL',(mn) ; to alternate register, not possible Z180

LD (mn),HL

Similar 16-bit loads and stores exist for DE, BC, SP, IX and IY.

It is possible to load data to the alternate registers, but it is not possible to store the data in
the alternate register directly to memory.

LD A’,(mn)

; allowed

** LD (mn),D’ ; **** not a legal instruction!

** LD (mn),DE’ ; **** not a legal instruction!

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