SUPER MICRO Computer SUPER X8STE - Manual (Page 82)

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X8ST3-F/X8STE User’s Manual
the S.M.A.R.T. Select Enabled to allow the AMI BIOS to use the S.M.A.R.T. to
support hard drive disk. The options are Disabled, Enabled, and
Auto.
32-Bit Data Transfer
Select Enable to enable the function of 32-bit IDE data transfer. The options are
Enabled and Disabled.
 PCI/PnP Configuration
This feature allows the user to set the PCI/PnP configurations for the following
items:
Clear NVRAM
This feature clears the NVRAM during system boot. The options are
No and
Yes.
Plug & Play OS
Selecting Yes allows the OS to configure Plug & Play devices. (This is not required
for system boot if your system has an OS that supports Plug & Play.) Select
No to
allow the AMI BIOS to configure all devices in the system.
PCI Latency Timer
This feature sets the latency Timer of each PCI device installed on a PCI bus. Select
64 to set the PCI latency to 64 PCI clock cycles. The options are 32,
64, 96, 128,
160, 192, 224 and 248.
PCI IDE Bus Master
When enabled, the BIOS uses PCI bus mastering for reading/writing to IDE drives.
The options are Disabled and
Enabled.
PCIE I/O Performance
This feature selects the setting for the IOH PCIE maximum payload size. The op-
tions are
128B and 256B.
ROM Scan Ordering
This item determines what kind of option ROM activates over another. The options
are
Onboard First and Add-on First.
Slot 1 PCI 33MHz, Slot 2 PCI 33MHz, Slot 3 PCIE x8, Slot 4 PCIE x4 on x8,
Slot 5 PCIE x8, Slot 6 PCIE x8 on x16
Use this feature to enable or disable a PCI-E or a PCI slot. The options are Dis-
abled and
Enabled.