Wake-on-ring, Wake-on-lan, X6dht-g user's manual – SUPER MICRO Computer X6DHT-G User Manual

Page 38: Uper x6dht-g

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X6DHT-G User's Manual

Wake-On-Ring

The Wake-On-Ring header is des-

ignated JWOR. This function al-

l o w s y o u r s y s t e m t o b e

"awakended" by an incoming call

to the modem when in suspend

state. See the table on the right

for pin definitions. You must have

a Wake-On-Ring card and cable

to use this feature.

Wake-on-Ring

Pin Definitions

(JWOR)

Pin

Number

1
2

Definition

Ground

W ake-up

Pin

Number

1
2
3

Definition

+5V Standby

Ground

W ake-up

W ake-On-LAN Pin

Definitions (W OL)

Wake-On-LAN

The Wake-On-LAN header is des-

ignated WOL. See the table on the

right for pin definitions. You must

enable the LAN Wake-Up setting in

BIOS to use this feature. You must

a l s o h a v e a L A N c a r d w i t h a

W a k e - o n - L A N c o n n e c t o r a n d

cable.

W O R

W O L

LAN1

®

JLAN1

S

UPER X6DHT-G

LAN2

DIMM 2A

DIMM 2B

DIMM 3A

DIMM 3B

DIMM 4A

DIMM 4B

DIMM 1B

DIMM 1A

12V 8-pin
P W R

SMBus
P W R

JF1

FP Control

OH
LED

IPMI

IDE2

Floppy

COM2

BIOS

Fan4

SATA0

SMB

PCI-X100 MHz

PCI-X 100 MHz/ZCR

PCI-X 3 133 MHz

Battery

JPL1

RAGE-
X L

PCI-E X8

Lindenhurst
North
Bridge

VGA

COM1

U S B
0/1

K B /
Mouse

Fan6 Fan5

ATX PWR

12V 4-Pin
PWR

Parrallel

Port

24-Pin

Fan7

JPW1

Fan8

CPU1

JWOR

S I/O

PSF

Fan3

IDE1

PCI-33 MHz

USB2/3

ICH

JD1

JPG1

J W D

Slot1

Slot2

Slot3

Slot4

Slot5

Slot6

PCI-E X8

GLAN
CTLR

6300ESB

Buzzer

P X H

JBT1

SATA1

SATA0

SATA1

SATA2

SATA3

SATA4

SATA5

SATA6

SATA7

Marvell

Intel

GLAN
CTLR

JPL2

M-SA

T

A

Act LED

J L 1

M-SA

T

A

I

2

C

JPS1

SATA

Controller

Fan2

Fan1

JAR

J3P

CPU2

E7520

Bank1

Bank2

Bank3

Bank4

WOL

DS9

DS1

DS10

DS2

DS11

DS3

DS12

DS4

DS13

DS5

DS14

DS6

DS15

DS7

DS16

DS8

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