Sony MVS8000SF-C - Manual (Page 47)

1-39
MVS-8000SF
1-8. Checks on Completion of Installation
CN3303 (A-6) : DEBUG terminal
Not used.
This terminal conforms to RS-232C.
CN3901 (A-11) : IEEE1394 terminal
Not used.
This terminal conforms to IEEE1394.
<TEST terminal>
E1 (P-4), E2 (P-8), E3 (P-12), E4 (L-12), E5 (J-11),
E6 (H-13), E7 (H-4), E8 (H-8), E9 (D-8), E10 (E-4) :
GND terminal
Use this terminal as the earth point for measuring the
respective check terminals.
TP1 (B-4) : + + + + +3.3 V check terminal
+3.3 V measuring terminal.
TP2 (D-3) : + + + + +2.5 V check terminal
+2.5 V measuring terminal.
TP3001 (M-12) : VCLK signal check terminal
VCLK signal measuring terminal.
TP3002 (L-13) : VD (vertical sync) signal check
terminal
VD signal measuring terminal.
TP3003 (L-13) : HD (horizontal sync) signal check
terminal
HD signal measuring terminal.
TP3004 (L-13) : FLOE (Field Odd Even) signal
check terminal
FLOE signal measuring terminal.
TP3005 (L-13) : CKX (control timing) signal check
terminal
CKX signal measuring terminal.
TP3401 (H-12) : EXT_CLK check terminal
CPU clock measuring terminal.
(KOA CPU clock check terminal)
<LED on the CPU DK module> (C-10)
Refer to < LED on the CPU DK module > in “1. CA-44
board”.
<Switch on the CPU DK module> (C-10)
Refer to < Switch on the CPU DK module > in “1. CA-44
board”.