SMC Networks SMC91C95 User Manual
Page 109
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109
FIGURE 19 - PCMCIA MEMORY WRITE TIMING
A[5:0], nREG
nCE1
nWE
D[15:0 (Din)]
250 min
t4
t1
t5
0 min
t2
Parameter
Min
Typ
Max
Units
t1
nWE Pulse Width
150
ns
t2
Address/nREG Setup Time to
nWE Low
30
ns
t3
Address/nREG Setup Time to
nWE High
180
ns
t4
nCE1 Low to nWE High Setup
Time
180
ns
t5
Data to nWE High Setup Time
80
ns
t6
Data Hold Time from nWE High
30
ns
t7
Write Recovery Time (Address,
nREG Hold from nWE High)
30
ns
nOE
t3
20 min
t7
t6
NOTE: Minimum write pulse width must be met whether or not nWAIT is
asserted by the SMC91C95
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