SMC Networks SMC91C95 - Manual (Page 116)

116
FIGURE 24 - CONSECUTIVE PCMCIA WRITE CYCLES
5
5
0
15
25
15
185
30
9
t51 t52
t47 t49
t48 t50
t20
t54 t55
valid
valid
A0-9,A15
nREG
nCE1,nCE2
nIOWR
D0-15
t47
t48
t49
t50
t51
t52
t20
t54
t55
ns
ns
ns
ns
ns
ns
ns
ns
ns
nREG Low Setup to Control Active
nCE1,nCE2 Setup to Control Active
nREG Hold after Control Inactive
nCE1,nCE2 Hold after Control Inactive
Address Setup to Control Active
Address Hold after Control Inactive
Cycle Time (No Wait States)
Write Data Setup to nIOWR Rising
Write Data Hold after nIOWR Rising
Parameter min typ max units