SMC Networks SMC91C95 - Manual (Page 34)

34
POWERDOWN LOGIC
The pins and bits involved in powerdown are:
1. PWRDWN/TXCLK - Input pin valid when
XENDEC is not zero (0).
2. Pwrdwn bits in ECSR and MCSR registers -
One bit for each function
3. Enable Function bits in ECOR and MCOR
registers - One bit for each function
4. PWRDN - Ethernet powerdown bit in Control
Register.
5. WAKUP_EN - Magic packet receive enable
bit in the Control Register
6. nWAKEUP - Pin for Magic Packet receive +
Ethernet function powerdown
SMC91C95 Powerdown States:
A) The SMC91C95 is Off and no Clock is
running
B1) The SMC91C95 of Off with clock running (No
Active LAN or Host Data Transfer) TBD
Current Reduction with No Link Pulses for
LAN access
B2) The SMC91C95 of Off with clock running (No
Active LAN or Host Data Transfer) TBD
Current Reduction with Link active
C) The SMC91C95 is completely powered up
(With Active LAN or Host Data transfer) 80MA
Max, 40MA typ.
Table 6 - Powerdown Functions
POWERDOWN
ENTERED
POWERDOWN
EXITED POWERS
DOWN:
DOES NOT
POWER DOWN
(A) PWRDWN/
TXCLK Pin When pin is high
and reset is
inactive When pin goes
low Ethernet Function
including Link
circuitry; Modem
Function
(B1) ECOR and
ECSR Powerdown
Bits Pwrdwn bit in
ECSR is high or
Enable Function bit
in ECOR is low. Otherwise, or
when function is
reset in ISA
mode Ethernet Function
plus any analog
logic including link
logic Modem function,
Attribute Memory
and PCMCIA
Configuration
Registers access
(B2) Power State
MCOR and MCSR
Bits Pwrdwn bit in
MCSR is high or
Enable Function bit
in MCOR is low. Otherwise; or
Ringing from
modem chipset Modem Ethernet function,
Attribute Memory
and PCMCIA
Configuration
Registers access
(B2) Power State
WAKUP_EN
(Control Register) Pwrdwn bit in
ECSR is high or
Enable Function bit
in ECOR is low or
PWRDN bit in
Control Register is
high Magic Packet
received
(WAKUP in EPH
status) Ethernet MAC
logic (Link is
enabled) Modem Function,
Attribute memory
and PCMCIA
configuration
Registers access,
Link Logic