National Instruments 700 - Manual (Page 41)

Theory of Operation Chapter 4
DAQCard-700 User Manual 4-4 © National Instruments Corporation
CLK0
A/D
Data
EXTCONV*
12 16
Data
A/D RD
CONVAVAIL
PCMCIA
I/O Channel
OUT0
Instrumentation
Amplifier
Input
Mux1
Dual
(8-Channel
Single-
Ended)
8
8
Input
Mux2
(4-Channel)
Buffer
512-Word
FIFO,
Sign
Extension
12-Bit
Sampling
ADC
PCMCIA
I/O
Channel
Interface
+
-
I/O Connector
Scanning Counter
4
A/D Timing MSM82C54
Interrupt
Interface
1 MHz
Figure 4-3. Analog Input and Data Acquisition Circuitry Block Diagram
Analog Input Circuitry
The analog input circuitry consists of an input multiplexer, a software-selectable gain stage, and
a 12-bit sampling ADC. The 12-bit output is sign-extended to 16 bits, then stored in a 512-word-
deep FIFO memory.
The input multiplexer stage is made up of two CMOS analog input multiplexers. In single-ended
mode, the input multiplexers switch between 16 analog input channels (channels 0 through 15).
In differential mode, one of the input multiplexers switches between eight differential pairs
(channels 0 and 8, 1 and 9, and so on). With the input multiplexer stage, input overvoltage
protection of
±
30 V is available, powered on or off.
The DAQCard-700 uses a 12-bit successive-approximation ADC. Software-selectable gains of
1, 0.5, and 0.25 for the input signal combined with the ADC fixed input range of
±
10 V yield
three useful analog input signal ranges. These ranges are
±
10 V,
±
5 V, and
±
2.5 V.
When an A/D conversion is complete, the ADC clocks the result into the A/D FIFO. The A/D
FIFO is 16 bits wide and 512 words deep. This FIFO serves as a buffer to the ADC and has two
benefits. First, when an A/D conversion is complete, the value is saved in the A/D FIFO for later
reading, and the ADC is free to start a new conversion. Secondly, the A/D FIFO can collect up
to 512 A/D conversion values before any information is lost, thus giving the software some extra
time (512 times the sample interval) to catch up with the hardware. If more than 512 values are
stored in the A/D FIFO without the A/D FIFO being read from, an error condition called A/D
FIFO overflow occurs and A/D conversion information is lost.