NEC Network Controller uPD98502 - Manual (Page 198)

CHAPTER 3 SYSTEM CONTROLLER
198 Preliminary User’s Manual S15543EJ1V0UM
3.2.11 S_WRSR (Warm Reset Status Register)
The warm reset status register “S_WRSR” is a read-only and 32-bit word-aligned register. S_WRSR indicates the
response from USB Controller, Ethernet Controller, ATM Cell Processor, UART, and PCI Controller independently.
S_WRSR is initialized to 0 at reset and contains the following fields:
Bits Field R/W Default Description
31:6 Reserved R 0 Hardwired to 0.
5 PCIWRST R 0 Indicates warm reset status from PCI Controller:
0 = PCI Controller is busy to perform the warm reset.
1 = warm reset has been done. PCI Controller is ready.
4 UARTWRST R 0 Indicates warm reset status from UART:
0 = UART is busy to perform the warm reset.
1 = warm reset has been done. UART is ready.
3 MAC2WRST R 0 Indicates warm reset status from Ethernet Controller #2:
0 = Ethernet Controller #2 is busy to perform the warm reset.
1 = warm reset has been done. MAC Ethernet Controller #2 is ready.
2 ATMWRST R 0 Indicates warm reset status from ATM Cell Processor:
0 = ATM Cell Processor is busy to perform the warm reset.
1 = warm reset has been done. ATM Cell Processor is ready.
1 MACWRST R 0 Indicates warm reset status from Ethernet Controller #1:
0 = Ethernet Controller #1 is busy to perform the warm reset.
1 = warm reset has been done. MAC Ethernet Controller #1 is ready.
0 USBWRST R 0 Indicates warm reset status from USB Controller:
0 = USB Controller is busy to perform the warm reset.
1 = warm reset has been done. USB Controller is ready.