National Instruments 6508 PCI-DIO-96 - Manual (Page 29)

Chapter 3 Signal Connections
© National Instruments Corporation 3-9 PCI-DIO-96 User Manual
INTR Output Interrupt Request—This signal becomes high when the
82C55A requests service during a data transfer. The
appropriate interrupt enable bits must be set to generate this
signal.
RD* Internal Read—This signal is the read signal generated from the control
lines of the computer I/O expansion bus.
WR* Internal Write —This signal is the write signal generated from the
control lines of the computer I/O expansion bus.
DATA Bidirectional Data Lines at the Specified Port—This signal indicates the
availability of data on the data lines at a port that is in the output
mode. If the port is in the input mode, this signal indicates when
the data on the data lines should be valid.
Table 3-3. Signal Names Used in Timing Diagrams (Continued)
Name Type Description