National Instruments 6508 PCI-DIO-96 - Manual (Page 58)

Chapter 6 Programming
PCI-DIO-96 User Manual 6-12 © National Instruments Corporation
Port C Status-Word Bit Definitions for Input
(Ports A and B)
Address: Base address + 03 (hex) for PPI A
Base address + 07 (hex) for PPI B
Base address + 0B (hex) for PPI C
Base address + 0F (hex) for PPI D
Type: Read and write
Word Size: 8-bit
Bit Map:
Bit Name Description
7–6 I/O Input/Output—These bits can be used for
general-purpose I/O when port A is in mode 1 input.
If these bits are configured for output, the port C bit
set/reset function must be used to manipulate them.
5 IBFA Input Buffer Acknowledgment for Port A—A high
setting indicates that data has been loaded into the
input latch for port A.
4 INTEA Interrupt Enable Bit for Port A—Setting this bit
enables interrupts from port A of the 82C55A.
Control this bit by setting/resetting PC4.
3 INTRA Interrupt Request Status for Port A—When INTEA
and IBFA are high, this bit is high, indicating that an
interrupt request is pending for port A.
2 INTEB Interrupt Enable Bit for Port B—Setting this bit
enables interrupts from port B of the 82C55A.
Control this bit by setting/resetting PC2.
1 IBFB Input Buffer Acknowledgment for Port B—A high
setting indicates that data has been loaded into the
input latch for port B.
0 INTRB Interrupt Request Status for Port B—When INTEB
and IBFB are high, this bit is high, indicating that an
interrupt request is pending for port B.
7 6 5 4 3 2 1 0
I/O I/O IBFA INTEA INTRA INTEB IBFB INTRB