National Instruments 6508 PCI-DIO-96 - Manual (Page 49)

Chapter 6 Programming
© National Instruments Corporation 6-3 PCI-DIO-96 User Manual
PCI Initialization for the PC
To program at the register level without NI-DAQ, you must know the
PCI-DIO-96 base memory address and install an interrupt handler to
generate interrupts. Writing an interrupt handler is solely left to you
and is not discussed in this manual. The PCI-DIO-96 uses the MITE
Application Specific Integrated Circuit (ASIC) chip as the PCI bus
interface. National Instruments designed this ASIC specifically for
data acquisition. In order for the board to operate properly this chip
must be configured. Ordinarily, NI-DAQ performs this function, but if
you are not using NI-DAQ, then you must configure the MITE ASIC
chip. The following sections explain how to accomplish this. The
references made about PCI BIOS
1
calls are left to you to implement.
In order to configure the MITE chip you must first write an algorithm
that finds and stores all configuration information about the
PCI-DIO-96. You can do this by using PCI BIOS calls to search PCI
configuration space for the National Instruments vendor ID (0x1093)
and PCI-DIO-96 device ID (0x0160). If a board is found, the algorithm
stores all the board’s configuration information into a data structure.
Base Address Register 0 (BAR0) corresponds to the base address of the
MITE, while Base Address Register 1 (BAR1) is the base address of the
board registers. The size of each of these windows is 4 KB. Both
addresses will most likely be mapped above 1 MB in the memory map.
This means that in order to communicate with the board you must know
how to perform memory cycles to extended memory. Information is
provided to re-map the board under 1 MB in the memory map, which
makes communicating with the board simpler. PCI BIOS read and write
calls are used to accomplish this. Use the pseudocode in this section to
re-map the board below 1 MB. If you choose not to re-map the board,
you must still perform Steps 4 and 5. All values in this example are
32 bits.
1. Write the address to which you want to re-map the MITE to PCI
configuration space offset 0x10 (BAR0).
2. Write the value 0x0000aeae to offset 0x340 from the new MITE
address.
3. Write the address to which you want to re-map the board to PCI
configuration space offset 0x14 (BAR1).
1. You can obtain more information on PCI BIOS calls from the PCI SIG on the World Wide
Web.