VT1433B User's Guide
Using the VT1433B
3-16
ch 1
Input 1
Input 2
ch 8
Static
RAM
FIFO
FIFO (DRAM)
circular
buffer
to VME Bus
or Local Bus
trigger
ch 1
ch 2
ch 3
ch 4
ch 5
VME
Bus
Local
Bus
96002
trigger
96002
host
port
Local
Bus
FIFO
Figure 3-5: Data flow and FIFO architecture