Ml605 evaluation board, Overview, Additional information – Xilinx ML605 User Manual
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ML605 Hardware User Guide
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UG534 (v1.8) October 2, 2012
Chapter 1
ML605 Evaluation Board
Overview
The ML605 board enables hardware and software developers to create or evaluate designs
targeting the Virtex®-6 XC6VLX240T-1FFG1156 FPGA.
The ML605 provides board features common to many embedded processing systems.
Some commonly used features include: a DDR3 SODIMM memory, an 8-lane PCI
Express® interface, a tri-mode Ethernet PHY, general purpose I/O, and a UART.
Additional user desired features can be added through mezzanine cards attached to the
onboard high-speed VITA-57 FPGA Mezzanine Connector (FMC) high pin count (HPC)
expansion connector, or the onboard VITA-57 FMC low pin count (LPC) connector.
provides a general listing of the board features with details provided in
Additional Information
Additional information and support material is located at:
This information includes:
•
Current version of this user guide in PDF format
•
Example design files for demonstration of Virtex-6 FPGA features and technology
•
Demonstration hardware and software configuration files for the System ACE™ CF
controller, Platform Flash configuration storage device, and linear flash chip
•
Reference design files
•
Schematics in PDF and DxDesigner formats
•
Bill of materials (BOM)
•
Printed-circuit board (PCB) layout in Allegro PCB format
•
Gerber files for the PCB (Many free or shareware Gerber file viewers are available on
the internet for viewing and printing these files.)
•
Additional documentation, errata, frequently asked questions, and the latest news
For information about the Virtex-6 family of FPGA devices, including product highlights,
data sheets, user guides, and application notes, see the Virtex-6 FPGA documentation page
.