Rainbow Electronics ATmega8HVD - Manual (Page 114)

114
8052B–AVR–09/08
ATmega4HVD/8HVD
21. FET Control
21.1 Overview
The FET control is used to enable and disable the Charge FET and Discharge FET. Normally,
the FETs are enabled and disabled by SW writing to the FET Control and Status Register
(FCSR). However, the autonomous Battery Protection circuitry will if necessary override SW
settings to protect the battery cells from too high Charge- or Discharge currents. Note that the
CPU is never allowed to enable a FET that is disabled by the battery protection circuitry. The
FET control is shown in
Figure 21-1 .
If Current Protection is activated by the Battery Protection circuitry both the Charge FET and
Discharge FET will be disabled by hardware. When the protection disappears the Current Pro-
tection Timer will ensure a hold-off time of 1 second before software can re-enable the
external FETs.
If C-FET is disabled and D-FET enabled, discharge current will run through the body-drain
diode of the C-FET and vice versa. To avoid the potential heat problem from this situation,
software must ensure that D-FET is not disabled when a charge current is flowing, and that C-
FET is not disabled when a discharge current is flowing.
If charging deeply over-discharged cells, the FET driver must be operated in the Deep Under-
voltage Recovery mode. When the cell voltage raises to an acceptable level, Deep Under-volt-
age Recovery mode should be disabled by software by setting the FCSR (DUVRD bit). To
avoid that C-FET is opened while current protection is active, DUVR mode is automatically
disabled by hardware, in this case.
Figure 21-1. FET Control Block Diagram
21.1.1 FETs disabled during reset
During reset, both FETs will be disabled immediately and the chip will exit from DUVR mode. It
is important to notice that a reset will lead to an immediate disabling of the FETs regardless of
the Battery Protection parameter settings. A BOD reset may occur as a result of a short-circuit
condition. Depending on the selected Battery Protection Timing, actual current consumption
and dimensioning of CREG, a BOD reset may occur before the Battery Protection delay timing
has expired, causing the FETs to be disabled.
FET
Control
and
Status
Register
DFE
CFE
BATTERY_PROTECTION
Power-off Mode
8-
B
IT
D
A
T
A
B
U
S
CHARGE_EN
DISCHARGE_EN
DUVRD
DUVR_OFF
Current Protection
Timer