Rainbow Electronics ATmega8HVD - Manual (Page 5)

5
8052B–AVR–09/08
ATmega4HVD/8HVD
tains a high-voltage tolerant, open-drain IO pin that supports serial communication.
Programming can be done in-system using the 4 General Purpose IO ports that support SPI
programming
The MCU includes 4K/8K bytes of In-System Programmable Flash with Self-programming
capabilities, 256 bytes EEPROM, 512 bytes SRAM, 32 general purpose working registers, 4
general purpose I/O lines, debugWIRE for On-chip debugging and SPI for In-system Program-
ming, two flexible Timer/Counters with Input Capture, internal and external interrupts, a 10-bit
ADC for measuring the cell voltage and on-chip temperature, a programmable Watchdog
Timer with wake-up capabilities, and software selectable power saving modes.
The AVR core combines a rich instruction set with 32 general purpose working registers. All
the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two inde-
pendent registers to be accessed in one single instruction executed in one clock cycle. The
resulting architecture is more code efficient while achieving throughputs up to ten times faster
than conventional CISC microcontrollers.
The device is manufactured using Atmel’s high voltage high density non-volatile memory tech-
nology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System,
by a conventional non-volatile memory programmer or by an On-chip Boot program running
on the AVR core.
The ATmega4HVD/8HVD AVR is supported with a full suite of program and system develop-
ment tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, and
On-chip Debugger.
The ATmega4HVD/8HVD is a low-power CMOS 8-bit microcontroller based on the AVR archi-
tecture. It is part of the AVR Smart Battery family that provides secure authentication, highly
accurate monitoring and autonomous protection for Lithium-ion battery cells.
3. Resources
A comprehensive set of development tools, application notes and datasheets are available for
download on http://www.atmel.com/avr.
Note: 1.
4. Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less
than 1 PPM over 20 years at 85°C or 100 years at 25°C.
5. About Code Examples
This documentation contains simple code examples that briefly show how to use various parts
of the device. These code examples assume that the part specific header file is included
before compilation. Be aware that not all C compiler vendors include bit definitions in the
header files and interrupt handling in C is compiler dependent. Please confirm with the C com-
piler documentation for more details.
For I/O Registers located in extended I/O map, "IN", "OUT", "SBIS", "SBIC", "CBI", and "SBI"
instru0ctions must be replaced with instructions that allow access to extended I/O. Typically
"LDS" and "STS" combined with "SBRS", "SBRC", "SBR", and "CBR".