Cirrus Logic CS4244 - Manual (Page 34)

DS900F1 34
CS4244
111
S
lots 13-16 of SDIN2
101
S
lots 5-8 of SDIN2
110
Sl
ot
s 9-
12 of
SD
IN
2
011
S
lots 13-16 of SDIN1
100
S
lots 1-4 of SDIN2
001
S
lots 5-8 of SDIN1
010
Sl
ot
s 9-
12 of
SD
IN
1
DA
C
1-4
Sour
ce
[2:
0]
D
A
C
1-
4 D
ata is in:
000
S
lots 1-4 of SDIN1
SD
IN
1
SD
IN
2
MCLK =
12.288/24.576MHz
FS/LRCK =
48/96kHz
S
C
L
K
=
12.288/24.576MHz
Slot
1 [31:0]
Slot 2 [31:0]
Slot 3 [
3
1
:0]
Slo
t 4 [31:0]
Slot 5 [31:0]
Slot 6 [
31:0]
S
lo
t 7 [31:0]
Slot 8 [31:
0]
DA
C1 [23:0]
x
D
A
C
2
[
23:0]
x
D
A
C
3 [23:0]
x
D
A
C
4 [23:
0]
x
x
x
x
x
xx
xx
xxx
x
Fi
g
u
re
2
2.
Ex
a
m
pl
e
Seri
al
Da
ta
So
u
rce
Se
le
ct
io
n