Cirrus Logic CS4244 - Manual (Page 44)

DS900F1 44
CS4244
USER: Mask bit(s)
set to 0
Unmasked error
occurs
Status Register bit
changes to ‘1’ and
INT pin set to
active level
USER: Read
Status Registers
(see status bit(s) =
‘1’)
Mask bit(s) of
corresponding
status bit(s) set to
‘1’
Are any
errors still
occurring?
Yes
No
Status Register
bit(s) set to ‘1’
USER: Read
Status Registers
(see all status bits
= ‘0’)
All Status Register
bits cleared
INT pin set to
inactive level
USER: Takes
Corrective Action
Ne
w
U
nm
as
ke
d
E
rr
or
Ne
w
Un
m
a
sk
ed
E
rr
or
Ne
w
U
nm
a
sk
ed
E
rr
or
Ne
w U
nm
as
ke
d E
rr
or
Ne
w U
n
m
as
ke
d E
rr
or
Ne
w U
nm
as
ke
d
E
rr
o
r
Figure 31. Interrupt Behavior and Example Interrupt Service Routine