Cirrus Logic CS4265 - Manual (Page 19)

DS657F3 19
CS4265
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT
Logic ‘0’ = DGND = AGND = 0 V; Logic ‘1’ = VL, C
L
= 20 pF. (Note 23)
23. See Figures 3 and 4 on page 20 .
Parameter Symbol Min Typ Max Unit
Sample Rate Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
Fs
Fs
Fs
4
50
100
-
-
-
50
100
200
kHz
kHz
kHz
MCLK Specifications
MCLK Frequency f mclk 1.024 - 51.200 MHz
MCLK Input Pulse Width High/Low t clkhl 8 - - ns
MCLK Output Duty Cycle 45 50 55 %
Master Mode
LRCK Duty Cycle - 50 - %
SCLK Duty Cycle - 50 - %
SCLK falling to LRCK edge t
slr
-10 - 10 ns
SCLK falling to SDOUT valid t
sdo
0 - 36 ns
SDIN valid to SCLK rising setup time t
sdis
16 - - ns
SCLK rising to SDIN hold time t
sdih
20 - - ns
Slave Mode
LRCK Duty Cycle 40 50 60 %
SCLK Period
Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
t
sclkw
t
sclkw
t
sclkw
-
-
-
-
-
-
ns
ns
ns
SCLK Pulse Width High t
sclkh
30 - - ns
SCLK Pulse Width Low t
sclkl
48 - - ns
SCLK falling to LRCK edge t
slr
-10 - 10 ns
SCLK falling to SDOUT valid t
sdo
0 - 36 ns
SDIN valid to SCLK rising setup time t
sdis
16 - - ns
SCLK rising to SDIN hold time t
sdih
20 - - ns
10 9
128
 Fs
---------------------
10 9
64
 Fs
------------------
10 9
64
 Fs
------------------