12 debug header, 13 cs2000 clock synthesizer, 14 cs42528 s/pdif rx – Cirrus Logic CK4970x4 User Manual

Page 16: 15 cs42528 audio codec, 16 cs4344 dac, 12 debug header -9, 13 cs2000 clock synthesizer -9, 14 cs42528 s/pdif rx -9, 15 cs42528 audio codec -9, 16 cs4344 dac -9

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1-9

Copyright 2012 Cirrus Logic, Inc.

DS898CK7

CK49x System Description
CK49x User’s Manual

The CS4953xx/CS4970x4 has many applications stored in internal ROM, but a host is still required to

configure the application for a particular system. The CK49x allows the PC to act as a host to boot and

configure the DSP through the GUI software.

The DSP is booted primarily from external serial Flash (U13 on CDB49x) using the DSP Condenser

system for simplified MCU control.

1.3.12 Debug Header

The DC49xxx daughtercard (DSP daughtercard) has a debug port (TP13) intended for factory testing of

the DSP. By default, shunts are installed across the header to allow debug from the attached MCU. If the

jumpers are removed, it is possible to debug the DSP using an external controller.

1.3.13 CS2000 Clock Synthesizer

The CS2000 (U25) is a high performance clocking device that is used to reduce jitter on recovered clocks

through the use of a low-jitter PLL and clean reference clock. The CS2000 is used on this board to reduce

the jitter on the MCLK recovered from an HDMI link.

The CS2000 can also be programmed to pass the reference clock (XTAL_OUT from the DSP) directly to

the CS42528 audio CODEC and S/PDIF RX.

1.3.14 CS42528 S/PDIF RX

The CS42528 (U5) has an integrated 192 kHz S/PDIF receiver with an input multiplexer. All of the S/PDIF

sources on the board (RX0, RX1, DSP, U16) are connected to the CS42528 input multiplexer. The active

S/PDIF signal is selected by changing the internal mux through the serial host port of the CS42528. This

selection is controlled through the Audio In configuration within DSP Composer (see

Chapter 4,

"Programming the DSP on the CK49x Evaluation Board"

for details).

When S/PDIF audio is being processed, the CS42528 must master MCLK for the system (see

Figure 1-6

for details).

1.3.15 CS42528 Audio CODEC

The CS42528 (U5) is a high-performance, multi-channel audio CODEC capable of supporting sample

rates up to 192 kHz on its 2 ADCs and 8 DACs. This device is used for main-channel analog-to-digital and

digital-to-analog conversions on the CK49x.

All analog inputs (J5, J26, J28) and 8 of the analog outputs (J33 - J40) are connected to the CS42528.

The microphone input (J5) uses an external ADC (U7) to feed the dedicated ADC input of the CS42528.

When the microphone is in use, a special TDM format is used to deliver the digitized microphone audio to

the DSP via the SAI data output of the CS42528.

When analog audio is being processed, the 24.576 MHz crystal for the CS495xxx/CS497xxx must master

MCLK for the system (see

‘Audio Clocking on page 1-10

for details).

1.3.16 CS4344 DAC

The CS4344 (U3) is a high-performance, 2-channel DAC capable of converting audio data with sample

rates up to 192 kHz. This device is used for the dual-zone digital-to-analog conversions on the CK49x.

Analog outputs (J1, J10) are connected to the CS4344. The dual-zone DAC is connected to the DAO2

port of the CS495xxx/CS497xxx to allow up to 10 channels of simultaneous analog output.

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