Cirrus Logic CK4970x4 - Manual (Page 59)

C-1 Copyright 2012 Cirrus Logic, Inc. DS898CK7
Modifications to Improve the Signal Integrity of I 2 C Communications
CK49x User’s Manual
Appendix C
CDB49x Rev. A Rework for I
2
C Buffer on SCP_CLK
C.1 Modifications to Improve the Signal Integrity of I
2
C
Communications
The rework instructions in this appendix apply only to Rev. A of the CDB49x, and it is only necessary if the
user wants to communicate with the DSP using I
2 C rather than SPI. The board is configured to use SPI by
default, as SPI is a much faster protocol than I 2 C.
In order to improve the signal integrity of I 2 C communications, a modification has been created to buffer
the SCP_CLK signal driven from the PCA9517 buffer and make its falling edge cleaner at the DSP.
1. Cut the SCP_CLK trace on the bottom of board as shown in yellow.
2. Connect Pin 5 of NC7SZ125 buffer to 3.3V on J4.2
3. Connect the 3.3k resistor between pins 1 and 5 of NC7SZ125 buffer
4. Scrape the solder mask off the plane on the bottom of the board and connect to Pins 2 and 3 of
NC7SZ125 buffer
5. Connect 15  resistor to Pin 4 of the NC7SZ125 buffer and the other end of resistor to exposed end
of cut trace closest to J4.2 in Figure C-1
Figure C-1 shows the modifications made in Steps 1 to 5 on the actual board layout.