Rockwell Automation T8110B/T8110 Trusted TMR Processor - Manual (Page 14)

Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 14
ana_discrep_val
The value is specified as 512 counts per volt. It specifies the allowed difference between voltage
readings of Analogue Input channel slices before the TMR Processor indicates a channel discrepancy.
The Value applied here affects all Analogue Input Modules (Dual & TMR).
Changes to this value are not implemented until the TMR Processor is rebooted after the download of
the System.ini file.
Format :
ana_discrep_val=xx
Default = 40 (40/512 volts or 78mV).
dig_discrep_val
The value is specified as 512 counts per volt for T8402 and T8403 and 128 counts per volt for T8423.
It specifies the allowed difference between voltage readings of T8402,T8403 and T8423 Digital Input
channel slices before the TMR Processor indicates a channel discrepancy.
Changes to this value are not implemented until the TMR Processor is rebooted after the download of
the System.ini file.
Format :
dig_discrep_val=xx
Default = 250 (e.g. 250/512 volts or 512mV for T8403).
di120vac_discrep_val
The value is specified as 100 counts per volt. It specifies the allowed difference between voltage
readings of T8424 Digital Input channel slices before the TMR Processor indicates a channel
discrepancy.
Changes to this value are not implemented until the TMR Processor is rebooted after the download of
the System.ini file.
Format :
di120vac_discrep_val=xx
Default = 500 (500/100 volts or 5V).
do_discrep_val
The value is specified in counts per volt and matches the module voltage reading scale. It specifies the
allowed difference between voltage readings of Digital Output channel slices before the TMR
Processor indicates a channel discrepancy. This setting is used in all digital output modules and
T8449.
Changes to this value are not implemented until the TMR Processor is rebooted after the download of
the System.ini file.
Format :
do_discrep_val=xx
Default = 1000 (e.g. 1000/500th volts or 2V for T8451).