Rockwell Automation T8110B/T8110 Trusted TMR Processor - Manual (Page 21)

Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 21
3.3. Inter-Module Bus
Each Processor FCR contains a Bus Interface to the Inter-Module Bus. The triplicated Inter-Module
Bus provides communication interconnection between modules in the Trusted
TM Controller chassis, at
a data transfer rate of up to 150Mbaud.
The Inter-Module Bus handles the following triplicated signals:
Data - 8-bit, bi-directional bus.
Control - Bus clocks, module enables and bus direction control.
System Watchdog - A dynamic signal indicating the correct processing of
safety critical data. The signal is generated by the
hardware watchdog signal from each processor.
Power Fail - Indicating a power fault in the associated fault
containment region.
Active/Standby - Status line between the active/standby Trusted TM TMR
Processors that are used for negotiating the
active/standby state.
Slot - Indicating the left or right Trusted TM TMR Processor slot
position to the processor.
System ID - A 4 bit code indicating the system address to the
processor.
Additionally, a Chassis Connection signal is provided for grounding the module electromagnetic
interference shield.
3.3.1. Processor Memory Voting Bus
The Processor memory voting bus is 32-bits wide and provides real-time voting of memory read
cycles.
3.3.2. Inter-Module Bus Voting Bus
Data received from the Inter-Module Bus is processed via an independent voting bus. This bus
protects the three processor FCRs from a data fault, by exchanging data between them and the front-
panel FCR.
3.3.3. Processor Voting Bus
The Processor voting bus is a serial bus that provides fault protection for certain types of FCR signals.