Rockwell Automation T8110B/T8110 Trusted TMR Processor - Manual (Page 23)

Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 23
4. Operation
On power-up, the Trusted TM TMR Processor initialises its local resources and determines their
operability. This includes verification of memory, arithmetic and logic units, timers and all fault
detection mechanisms.
Figure 3 is a block diagram to illustrate module operation.
Figure 3 Block Diagram of Module Operation
The voter circuits read the input data from the Inter-Module Bus and carry out a continuous 2-oo-3 vote
of the data.
The voting and fault detection circuits enable the module to identify and isolate transient, intermittent
and permanent faults as they occur. All faults are recorded in the system’s fault history. Permanent
faults are also annunciated by an LED on the module front panel.
The input data is processed by the Bus Interface, checked for errors and I/O module faults before
being transmitted to the processor memory voting bus. The data is 2-oo-3 voted by voter circuits
before passing to the processors.
Each processor executes synchronously the application program with the other two processors. At the
same time, all process state input data, internal data and application program instructions are also
voted. Output data from the processors is transmitted via the Bus Interface to the Inter-Module Bus.
The output data from each of the module’s three processors is then transmitted to the output module.
In the output module, voter circuits perform discrepancy checks on the data. As long as there are no
discrepancies between the data, operation continues normally. If a voter circuit detects that the data it
receives from one processor is not the same as that being transmitted from the other, the Trusted
TM
TMR Processor reverts to 2-oo-3 operation and its error indicator set.