Carrier 50FK User Manual

Page 3

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Several temperature inputs are connected to the proces-

sor. There are either 4 or 5 thermistors (depending on the
field-installed accessories) which input temperature data
into the processor through pin terminal connector J1. See
Table 1 and Fig. 2.

Several status switches are also monitored. These switches

are connected to the processor at pin terminal connector J2.
See Fig. 3 and Table 2.

Table 1 — Pin Terminal Connector J1

Thermistor Inputs

CONNECTOR J1

TERMINAL NO.

TEMPERATURE

INPUT

UNIT SIZE

034-104

1,2

Reset Temperature*

T10

14,15

Saturated Condensing

Temp., Circuit 2

T4

16,17

Saturated Condensing

Temp., Circuit 1

T3

18,19

Return-Air Temperature

T2

20,21

Supply-Air Temperature

T1

LEGEND

T — Thermistor

*If equipped with accessory temperature reset package.

NOTE: Terminal numbers 3-13 are not used on these units.

In addition to the unit status switch inputs, the processor

board also accepts inputs from several potentiometers. These
potentiometers control various operational characteristics of
the system. Inputs are received by the processor through pin
terminal connector J3. See Fig. 4.

All of the potentiometers must be set before the unit is

started in order for the unit to function properly. See Start-
Up, Potentiometers section on page 28 for information on
establishing set points. Each of the potentiometers has a valid
range that is used by the control. The valid range is defined
as the potentiometer’s resistance value that the control will
not consider to be in error. This is usually between 10% and
90% of the potentiometer’s total resistance. The control has
been programmed to accept an operational range for the po-
tentiometer, which may not be the same as the valid range.

LEGEND

DIP

Dual In-Line Package

EPROM — Erasable, Programmable Read-Only Memory
EXV

Electronic Expansion Valve

Do not remove label covering EPROM. Removal causes pro-
gram to be erased.

Fig. 1 — Processor Board

*EPROM HT204485-1-XX where ‘‘XX’’ is the current revision

number.

NOTE: Processor Board is positioned in unit with J3 and J10 con-
nections at the bottom.

3

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