Achronix Speedster22i User Macro Guide User Manual

Page 191

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Multipliers

BMACC56

Speedster22i Macro Cell Library

Achronix Semiconductor Proprietary

PAGE 174

rst_b

input

Data Input B Register Reset (active-low). Asserting input rst_b per-
forms a synchronous reset of the Data Input b register upon the next
active edge of the clock, and will set the register to the value defined
by the rst_value_b parameter.

rst_sub

input

Subtract Input Register Reset (active-low). Asserting input rst_sub
performs a synchronous reset of the Subtract Input Register upon
the next active edge of the clock, and will set the register to the value
defined by the rst_level_sub parameter.

rst_cin

input

Carry In Input Register Reset (active-low). Asserting input rst_cin
performs a synchronous reset of the Carry In Input Register upon the
next active edge of the clock, and will set the register to the value
defined by the rst_level_cin parameter.

rst_mask_adda

input

Adda Mask Input Register Reset (active-low). Asserting input
rst_mask_adda performs a synchronous reset of the Adda Mask
Input Register upon the next active edge of the clock, and will set the
register to the value defined by the rst_level_mask_adda parameter.

rst_dout

input

Dout Output Register Reset (active-low). Asserting input rst_dout
performs a synchronous reset of the Dout and Cout output registers
upon the next active edge of the clock, and will set the dout register
to the value defined by the reset_dout parameter. and will set the
cout register to the value defined by the rst_level_cout parameter.

cascade_in[55:0]

input

Cascade In. The cascade input allows the 56-bit cascade_out output
of the previous BMACC56 block to be connected to the adda input of
the add/sub block. The cascade_out to cascade_in flows from the
bottom of the Speedster22i device to the top.

clk

input

Clock. Data is clocked into the input and output registers at the
active edge of the clock input. The active edge of the clock input is
selected by setting the clock_edge parameter to the appropriate
value.

dout[55:0]

output

Data Out. The dout[55:0] output is the 56-bit signed two’s comple-
ment output, where bit 55 is the most significant bit.

cout

output

Carry Out. The cout bit is set high if a carry was generated out of the
add/sub block.

cascade_out[55:0]

output

Cascade Out. Cascade_out may be fed to the next BMACC56 blocks
adda input. This can be used to help in the formation of sum-of-
products of multiple BMACC56 blocks when the sel_cascade_out
parameter is set to zero.

Name

Type

Description

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