Achronix Speedster22i User Macro Guide - Manual (Page 221)

PLL/DLL Clock Generators ACX_CLKGEN
Speedster Macro Cell Library www.achronix.com PAGE 204
.low_cnt0 (10'h0),
.half_cycle0 (1'b0),
.clken_out0 (1'b1),
.bypass1 (1'b0),
.outdiv1 (6'h4),
.en_phase1 (1'b1),
.static_phase1 (3'h0),
.dyn_phase1 (1'b0),
.byp_clkdiv1 (1'b1),
.high_cnt1 (10'h0),
.low_cnt1 (10'h0),
.half_cycle1 (1'b0),
.clken_out1 (1'b0),
.bypass2 (1'b0),
.outdiv2 (6'h4),
.en_phase2 (1'b1),
.static_phase2 (3'h0),
.dyn_phase2 (1'b0),
.byp_clkdiv2 (1'b1),
.high_cnt2 (10'h0),
.low_cnt2 (10'h0),
.half_cycle2 (1'b0),
.clken_out2 (1'b0),
.bypass3 (1'b0),
.outdiv3 (6'h4),
.en_phase3 (1'b1),
.static_phase3 (3'h0),
.dyn_phase3 (1'b0),
.byp_clkdiv3 (1'b1),
.high_cnt3 (10'h0),
.low_cnt3 (10'h0),
.half_cycle3 (1'b0),
.clken_out3 (1'b0)
)
User_ACX_CLKGEN
(
.refclk (user_refclk),
.fbclk (user_fbclk),
.rstn (user_rstn),
.outphrstn (user_outphrstn),
.core_clken (user_core_clken),
.phase_inc (user_phase_inc),
.clkout (user_clkout),
.pll_lock (user_pll_lock),
.ick_dspll_sif_clk (user_ick_dspll_sif_clk),
.ick_dspll_sif_rstn (user_ick_dspll_sif_rstn),
.ick_sbus_data (user_ick_sbus_data),
.ick_sbus_req (user_ick_sbus_req),
.ock_sbus_ack (user_ock_sbus_ack),
.ock_sbus_data (user_ock_sbus_data)
);