Kontron VMP3 - Manual (Page 76)

Configuration VMP3
Page 4 - 16 © 2005 Kontron Modular Computers GmbH ID 29230, Rev. 01
29230
.01.UG.VC.050727/091436
P R E L I M I N A R Y
4.3 UART Registers Address Mapping
4.3.1 UART A (SER1)
The following table indicate the address mapping of the UART A (SER1). For a more detailed
description please refer to the EXAR XR16C2850 or XR16C2750 DUART manual.
Accessible only when CS A/B is logical 0.
Accessible only when CS A/B is logical 0 and LCR bit 7 is a logical 1.
Accessible only when LCR is set to “BF” hex.
Table 4-19: UART A General Register Set
READ MODE WRITE MODE ADDRESS
Receive Holding Register Transmit Holding Register 0xFFFF 8000
n/a Interrupt Enable Register 0xFFFF 8001
Interrupt Status Register FIFO Control Register 0xFFFF 8002
n/a Line Control Register 0xFFFF 8003
n/a Modem Control Register 0xFFFF 8004
Line Status Register n/a 0xFFFF 8005
Modem Status Register n/a 0xFFFF 8006
Scratchpad Register Scratchpad Register 0xFFFF 8007
Table 4-20: UART A Baud Rate Register Set
READ MODE WRITE MODE ADDRESS
LSB of divisor latch LSB of divisor latch 0xFFFF 8000
MSB of divisor latch MSB of divisor latch 0xFFFF 8001
Table 4-21: UART A Enhanced Register Set
READ MODE WRITE MODE ADDRESS
Trigger Level Register Trigger Level Register 0xFFFF 8000
Feature Control Register Feature Control Register 0xFFFF 8001
Enhanced Feature Register Enhanced Function Register 0xFFFF 8002
Enhanced Mode Select Register Enhanced Mode Select Register 0xFFFF 8007
Xon-1 Xon-1 0xFFFF 8004
Xon-2 Xon-2 0xFFFF 8005
Xoff-1 Xoff-1 0xFFFF 8006
Xoff-2 Xoff-2 0xFFFF 8007