Typical tail circuit implementation, Rs-449 / 422 null cable diagram for 2240 – CANOGA PERKINS 2240 Fiber Optic Modem User Manual

Page 36

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Canoga Perkins

Figure 3-2.

Typical Tail Circuit

Implementation

NOTE: If the customer's DCE does not support TT (or equivalent)
lead, a buffered interface may be needed to realign the data or the
extra clock function may be used (refer to Section 4.9). Canoga
Perkins offers a wide selection of buffered interfaces.

Figure 3-3.

RS-449 / 422

Null Cable

Diagram

for 2240

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