CANOGA PERKINS 2240 Fiber Optic Modem - Manual (Page 37)

2240 Fiber Optic Modem
37
3.6 Consideration of Propagation Delays
Whenever the modem is sending a transmit clock to the DTE, it is important to
understand the effect of the time required for that clock to propagate from the
modem to the DTE.
Clock-to-Data phasing is particularly important in any synchronous data link. The
modem expects the data to be valid (unchanging) at the point in time when the
clock is transitioning to "clock" the data.
When the modem is the source of the transmit clock, there is a finite time delay
before that clock arrives at the DTE to clock its transmitter. There is another time
delay before the data from the DTE arrives back at the modem.
Since the modem uses its own clock signal to align the data, there is a potential for
these delays to make the data invalid at the point of re-alignment. This problem
only occurs at high data rates and if the cable to the DTE is very long or has high
capacitance.
In such cases it is desirable to use a clock signal sourced from the DTE, because it
will experience the same time delays as the data signal. To get an aligned clock
signal, loop the clock from the ST to TT leads at the DTE end of the cable (if the
DTE does not do this by default). Table 3-F lists delay times for sub-DSO rates.
NOTE: The 2240 can be made to use the TT signal for realigning the
data by turning ON the CLK / EXT switch on the main board. This
switch is position 7 of the internal options switches, as illustrated in
Figures 2-3 and 3-4. It is set to the OFF position when shipped from
the factory.
Sampled External Clock Frequency Delay
2.4 KHz 417 µ s
4.8 KHz 208 µ s
9.6 KHz 104 µ s
19.2 KHz 52 µ s
38.4 KHz 26 µ s
56 KHz 18 µ s
64 KHz 16 µ s
Table 3-F
Delay Time Through
Model 2240 at
Sub-DSO Rates