ADLINK ACL-8111 User Manual
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Operation Theorem • 27
4.1.1 A/D Conversion Procedure
The A/D conversion is starting by a trigger source, then the A/D converter will 
start to convert the signal to a digital value. The ACL-8111 provides three 
trigger modes, see section 4.1.2. 
The DRDY bit in the A/D data register (Base+5) will become to 0 once the 
A/D conversion is completed and data on the Base+4 and Base+5 are ready. 
A read data command on BASE+4 will automatically reset the DRDY bit to be 
1 which means data is not ready on the Base+4 and Base+5. The A/D data 
should be transferred into PC's memory for further using. The ACL-8111 
provides three data transfer modes that allow users to optimize the DAS 
system. Refer to section 4.1.3 for data transfer modes. 
4.1.2 A/D Clock Sources (Trigger Modes)
In the ACL-8111, two Internal or one external clock sources can trigger A/D 
conversion. The two internal sources are the software trigger and the timer 
pacer trigger, which is controlled by the A/D operation mode control register 
(BASE+11). The A/D operation modes combine the AD clock sources and 
the data transfer mode together. Please also refer to the next section for 
detail data transfer modes. The available operation modes include: 
• Software trigger and software polling transfer
• Internal timer pacer and interrupt transfer
• Internal timer pacer and software polling transfer
• External trigger and interrupt transfer
• External trigger and software polling transfer
Three AD clock sources (or trigger sources) are available in the ACL-8111.
Software trigger
The trigger source is software controllable in this mode. That is, the A/D 
conversion is starting when any value is written into the software trigger 
register (BASE+12). Under this mode, the timing of the A/D conversion is 
fully controlled by software, it is suitable for low speed A/D conversion. 
However, it is difficult to control the fixed A/D conversion rate except a timer 
interrupt service routine is used and the software trigger is programmed 
inside the interrupt service routines.