ADLINK ACL-8111 User Manual
Page 37
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Operation Theorem • 31
Note that the D/A registers are "double buffered", so that the D/A analog 
output signals will not be updated until the high byte is written. When write 12 
bits data to D/A registers of the ACL-8111, the low byte must be written 
before the high byte. This procedure can insure a single step transition when 
the D/A conversion. 
Note: when writing digital data to D/A register, the low byte data should
be written first, because the register will temporarily hold and not 
released to output. After the high byte is written, both high and low 
will add and passed to A/D converter. 
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                    See also other documents in the category ADLINK Hardware:
                    
                        
                
            
        - USB-1901 (84 pages)
- USB-1210 (54 pages)
- USB-2401 (60 pages)
- USB-7230 (50 pages)
- USB-2405 (56 pages)
- DAQe-2010 (92 pages)
- DAQe-2204 (100 pages)
- DAQe-2213 (94 pages)
- DAQe-2501 (74 pages)
- PXI-2010 (84 pages)
- PXI-2020 (60 pages)
- PXI-2501 (62 pages)
- cPCI-9116 (98 pages)
- ACL-8112 Series (94 pages)
- ACL-8112 Series (92 pages)
- ACL-8112 Series (93 pages)
- ACL-8216 (75 pages)
- PCM-9112+ (10 pages)
- PCM-9112+ (94 pages)
- cPCI-6216V (47 pages)
- ACL-6126 (28 pages)
- ACL-6128A (40 pages)
- PCM-6308V+ (52 pages)
- PCM-6308V+ (4 pages)
- PCI-7444 (82 pages)
- PCI-7434 (48 pages)
- PCI-7234 (56 pages)
- PCI-7260 (66 pages)
- PCI-7258 (38 pages)
- PCI-7256 (48 pages)
- PCI-7250 (48 pages)
- LPCI-7250 (48 pages)
- PCI-7396 (65 pages)
- PCI-7296 (59 pages)
- PCI-8554 (67 pages)
- PCIe-7360 (94 pages)
- PCIe-7350 (86 pages)
- PCIe-7300A (114 pages)
- PCIe-7200 (51 pages)
- PCI-7300A (112 pages)
- PCI-7300A (83 pages)
- PCI-7200 (96 pages)
- cPCI-7300 (82 pages)
- cPCI-7300 (83 pages)