Altera RapidIO II MegaCore Function - Manual (Page 11)

Chapter 1: About The RapidIO II MegaCore Function 1–3
Features
August 2014 Altera Corporation RapidIO II MegaCore Function
User Guide
■ Physical layer features
■ 1×/2×/4× serial with integrated transceivers
■ Fallback to 1× from 4× and 2× modes
■ Fallback to 2× from 4×
■ All five standard serial data rates supported: 1.25, 2.5, 3.125, 5.0 and
6.25 gigabaud (Gbaud)
■ Long control symbol
■ IDLE2 idle sequence
■ Extraction and insertion of command and status (CS) field
■ Support for software control of local and link-partner transmitter emphasis
■ Insertion of clock compensation sequences
■ Receive/transmit packet buffering, scrambling/descrambling, flow control,
error detection and recovery, packet assembly, and packet delineation
■ Automatic freeing of resources used by acknowledged packets
■ Automatic retransmission of retried packets
■ Scheduling of transmission, based on priority
■ Software support for ackID synchronization
■ Virtual channel (VC) 0 support
■ Reliable traffic (RT) support
■ Critical request flow (CRF) support
■ Transport layer features
■ Supports multiple Logical layer modules
■ Supports an Avalon Streaming (Avalon-ST) pass-through interface for custom
implementation of capabilities such as data streaming and message passing
■ A round-robin, priority-supporting outgoing scheduler chooses packets to
transmit from various Logical layer modules
■ Logical layer features
■ Generation and management of transaction IDs
■ Automatic response generation and processing
■ Response Request Timeout checking
■ Capability registers (CARs), command and status registers (CSRs), and Error
Management Extensions registers
■ Direct register access, either remotely or locally
■ Maintenance master and slave Logical layer modules