Adc add with carry (byte) – Zilog Z80380 User Manual
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Z380
™
U
SER
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S
M
ANUAL
DC-8297-03
Z
ILOG
ADC
ADD WITH CARRY (BYTE)
ADC A,src
src = R, RX, IM, IR, X
Operation:
A
←
A + src + C
The source operand together with the Carry flag is added to the accumulator and the sum
is stored in the accumulator. The contents of the source is unaffected. Two’s complement
addition is performed.
Flags:
S:
Set if the result is negative; cleared otherwise
Z:
Set if the result is zero; cleared otherwise
H:
Set if there is a carry from bit 3 of the result; cleared otherwise
V:
Set if arithmetic overflow occurs, that is, if both operands cleared otherwise
N:
Cleared
C:
Set if there is a carry from the most significant bit of the result; cleared otherwise
Addressing
Execute
Mode
Syntax
Instruction Format
Time
Note
R:
ADC A,R
10001-r-
2
RX:
ADC A,RX
11y11101 1000110w
2
IM:
ADC A,n
11001110 —n—
2
IR:
ADC A,(HL)
10001110
2+r
X:
ADC A,(XY+d)
11y11101 10001110—d—
4+r
I
Field Encodings:
r:
per convention
y:
0 for IX, 1 for IY
w: 0 for high byte, 1 for low byte