Daa decimal adjust accumulator – Zilog Z80380 User Manual
Page 76
5-42
Z380
™
U
SER
'
S
M
ANUAL
DC-8297-03
Z
ILOG
DAA
DECIMAL ADJUST ACCUMULATOR
DAA
Operation:
A
←
Decimal Adjust A
The accumulator is adjusted to form two 4-bit BCD digits following a binary, two’s
complement addition or subtraction on two BCD-encoded bytes. The table below indicates
the operation performed for addition (ADD, ADC, INC) or subtraction (SUB, SBC, DEC,
NEG).
C
Hex Value
H
Hex Value
Number
C
H
Before
Upper Digit
Before
Lower Digit
Added
After
After
Operation
DAA
(Bits 7-4)
DAA
(Bits 3-0)
to Byte
DAA
DAA
0
0-9
0
0-9
00
0
0
0
0-8
0
A-F
06
0
1
ADD
0
0-9
1
0-3
06
0
0
ADC
0
A-F
0
0-9
60
1
0
INC
0
9-F
0
A-F
66
1
1
(N=0)
0
A-F
1
0-3
66
1
0
1
0-2
0
0-9
60
1
0
1
0-2
0
A-F
66
1
1
1
0-3
1
0-3
66
1
0
SUB
SBC
0
0-9
0
0-9
00
0
0
DEC
0
0-8
1
6-F
FA
0
1
NEG
1
7-F
0
0-9
A0
1
0
(N=1)
1
6-F
1
6-F
9A
1
1
Flags:
S:
Set if the most significant bit of the result is set; cleared otherwise
Z:
Set if the result is zero; cleared otherwise
H:
See table above
P:
Set if the parity of the result is even; cleared otherwise
N:
Not affected
C:
See table above
Addressing
Execute
Mode
Syntax
Instruction Format
Time
Note
DAA
00100111
3