Table 4-7, Embedded display port distribution, Functional description – Artesyn COMX-CORE Series Installation and Use (August 2014) User Manual
Page 68

Functional Description
COMX-CORE Series Installation and Use (6806800K11F)
68
PEG Bifurcation
CFG[0]
PEG Bifurcation configuration.
High: PEG for x16 (Internal Pull Up);
Low: PCIE 2x8
Header control
High: Default
Low: Header control
External PEG Enable
GPIO48
External PEG x16 enable configuration
High: Internal PEG enable(Default)
Low: external PEG enable)
GPIO48 strap signal come
from carrier board
Table 4-7 Embedded Display Port Distribution
eDP Signal
PEG Signals
Lane Reversal
Description
eDP_TX[0]
PEG_TX[15]
PEG_TX[0]
eDP Lane 0
eDP_TX#[0]
PEG_TX#[15]
PEG_TX#[0]
eDP Lane 0 Compliment
eDP_TX[1]
PEG_TX[14]
PEG_TX[1]
eDP Lane 1
eDP_TX#[1]
PEG_TX#[14]
PEG_TX#[1]
eDP Lane 1 Compliment
eDP_TX[2]
PEG_TX[13]
PEG_TX[2]
eDP Lane 2
eDP_TX#[2]
PEG_TX#[13]
PEG_TX#[2]
eDP Lane 2 Compliment
eDP_TX[3]
PEG_TX[12]
PEG_TX[3]
eDP Lane 3
eDP_TX#[3]
PEG_TX#[12]
PEG_TX#[3]
eDP Lane 3 Compliment
eDP_AUX
PEG_RX[13]
PEG_RX[2]
eDP Auxiliary Channel
eDP_AUX#
PEG_RX#[13]
PEG_RX#[2]
eDP Auxiliary Channel
Compliment
eDP_HPD#
PEG_RX[12]
PEG_RX[3]
eDP Hot Plug Detect
Table 4-6 PEG Strap Signals (continued)
Port
Strap
How to Strap Port?
COMX-CORE Series
Status