FiberPlex FOM-1090 - Manual (Page 14)

DIP Switch Settings
Compatibility with MIL‐STD circuits
The drivers and receivers for V.11 signals are compatible with the MIL‐STD balanced specifications and the
V.10 interface is similar to MIL‐STD unbalanced. MIL‐STD‐100 signals use the same negative MARK condition
as TIA circuits, so there is no need to invert the TD and RD signals. MIL‐STD‐188‐114A is set‐up for user control
of the MARK level, so the need for data inversion at the FOM will need to be made on a case‐by‐case basis.
If the MIL‐STD interface uses any unbalanced signals, such as MIL‐STD‐188C (note that this standard uses a
positive MARK), then provisions will need to be made to externally bias one side of the receivers on the FOM
to use them single‐ended. Note that the MIL standards are only an electrical specification and do not specify a
pin out or connector type, so a custom cable will be required in many cases.
Asynchronous, Isochronous, or Synchronous operation
The FOM is transparent to data and clocking formats, so there are no switch settings for distinguishing the
different modes of operation. When a pair of FOM‐1090 units is used as modem link between two DTEs, all of
the input signals are transferred to the crossed‐over corresponding outputs (i.e. ‐ TT from the DTE is provided
as RT out of the FOM‐1090) at the opposite end. When the FOM is used in Send Timing applications, certain
switch options may be used to eliminate clocking issues that may arise. Those options are explained below.
Send Data Regeneration when using Send Timing from the DCE
The typical Send Timing set‐up has the DCE supplying all clocks. The ST signal is generated at the DCE and then
carried to the remote DTE. In return, the remote DTE then clocks the Send Data out of itself on the rising edge
of the supplied ST signal. The Send Data is carried back to the DCE where it is clocked in, sampling the data bit
on the falling edge of the generated ST clock. Alignment problems arise due to propagation delay when certain
combinations of data rate and cable distance (both copper and fiber) result in the Send Data transitions
occurring near the falling edge of the ST signal at the DCE.
As an example, using a rough number of 4 ns delay per meter of cable, 25 meters of cable with a 2.5 mHz clock
will cause a 180 degree shift in the ST‐SD relationship at the DCE interface. (There is actually 50 meters of
propagation delay since the clock travels 25 meters in one direction and the data travels 25 meters in the
other). This is without taking into account the delays of the line drivers and receivers in the DTE.
The FOM‐1091 regeneration options make up for this in two ways. The first is to correct for any SD‐ST
misalignment due to propagation delay from the FOM‐1091 to the DCE by delaying the SD signal out of the
FOM by one half of a ST clock cycle. The second is the FOM has the ability to retime the incoming SD data
internally with the incoming ST signal, which removes any sampling jitter from the SD signal as well as
correcting for propagation delays.
While the falling edge of the ST signal from the DCE is ideally located mid‐bit of the SD signal coming into the
DCE, it is not necessary for it to be mid‐bit. In fact, it’s usually not mid‐bit due to delays. This is often
misunderstood. The actual requirement is that the set‐up time for the register that the SD signal is being
loaded into be met and this is usually a fraction of the available bit time. The only time there is a problem is
when the falling edge of the ST is too close to the SD transitions at the DCE interface and this prevents the set‐
up time from being met. If the ST falling edge is far enough away from the SD transition edges (when the new
SD data bit has met the set‐up time), the DCE will still clock the data reliably even though it isn’t mid‐bit. This is
why many ST timing set‐ups will work with no regeneration required at all. When the edges are too close at
the DCE the FOM will need to retime the data on the opposite edge of the ST signal by setting switch 1.8 to
ON. This will allow that when the propagation delays are taken into account the edges have skewed enough to
meet the set‐up time at the DCE.
Note that in installations where the data rate may be changed or the cable lengths may change due to patch
panel routing of equipment, it’s entirely possible that a combination of switch settings that works in one
scenario will not work in another. The only solution to these situations is to insert more delay in one or more
of the configurations by adding to cable length until all of the scenarios will work with the same switch
settings.