Verilink PRISM 3001 (34-00186) Product Manual - Manual (Page 47)

Maintenance Screen 4-13
Port Unloop
Pressing Enter takes down the specified loop from the currently selected port.
Bit Error
Rate Testing
(BERT)
BERT
This field shows the direction that the BERT signal is sent. The choices are T1
NET, T1 DTE, One NET, and One DTE. Individual channels can be selected if
they are not mapped to the T1 DTE or high-speed port.
Pattern
Specifies the pattern to be transmitted during a test. Modifying this field does not
cause the pattern to be transmitted (refer to Start Test). BERT may also be
activated via the front panel switch. The choices are QRSS, 63, 511, 2047, 2
15
,
2
20
, 2
23
,1:8, 3:24, ALT, and CLEAR. The CLEAR pattern passes the received data
through the unit (alarm detection and reporting are disabled while the test is
active).
Test Length
Defines the run- time of test pattern generation and error accumulation. The
choices are Continuous, 15 min, 30 min, 60 min, and 24 Hour.
Start Test
Pressing Enter with the cursor on this field starts the selected test pattern. TEST IN
PROGRESS appears once the test has started. To end the test, press Enter on
STOP TEST.
Reset Errors
Pressing Enter with the cursor on this field clears the test error results.
The following fields are display only. They reflect the selected test parameters and
the results of these tests.
Pattern Sync
This field displays the current state of pattern sync during a test. If no test is in
progress, NO TEST is displayed. If a test is active, but the receiver is not in pattern
sync, NO SYNC is displayed. If the receiver is in pattern sync, IN SYNC is
displayed.
Elapsed Time
Displays the amount of time elapsed since a timed test began or, if completed, the
total test time.
Bit Errors
Displays the total number of bit errors detected since the test began or since error
statistics were cleared (up to 999,999).