Intel ARCHITECTURE IA-32 - Manual (Page 464)

IA-32 Intel® Architecture Optimization
B-10
Figure B-1 Relationships Between the Cache Hierarchy, IOQ, BSQ and Front
Side Bus
Chip Set System Memory
1st Level Data
Cache
3rd Level Cache
FSB_ IOQ
BSQ
Unified 2nd Level
Cache
1st Level Data
Cache
3rd Level Cache
FSB_ IOQ
BSQ
Unified 2nd Level
Cache