Intel ARCHITECTURE IA-32 - Manual (Page 489)

Using Performance Monitoring Events
B
B-35
Bus Accesses
from All Agents The number of all
bus transactions that
were allocated in the
IO Queue by all
agents. Beware of
granularity issues
with this event. Also
Beware of different
recipes in mask bits
for Pentium 4 and
Intel Xeon
processors between
CPUID model field
value of 2 and model
value less than 2. IOQ_allocation 1a. ReqA0 ,
ALL_READ ,
ALL_WRITE , OWN,
OTHER, PREFETCH
(CPUID model <
2); 1b.ReqA0,
ALL_READ ,
ALL_WRITE,
MEM_WB, MEM_WT,
MEM_WP, MEM_WC,
MEM_UC , OWN,
OTHER , PREFETCH
(CPUID model >=
2).
2. Enable edge
filtering 6 in
the CCCR.
Bus Accesses
Underway from
the processor
7
This is an accrued
sum of the durations
of all bus
transactions by this
processor. Divide by
“Bus Accesses from
the processor” to get
bus request latency.
Also Beware of
different recipes in
mask bits for
Pentium 4 and Intel
Xeon processors
between CPUID
model field value of 2
and model value less
than 2. IOQ_active_entries 1a. ReqA0 ,
ALL_READ ,
ALL_WRITE , OWN,
PREFETCH
(CPUID model <
2); 1b.ReqA0,
ALL_READ ,
ALL_WRITE,
MEM_WB, MEM_WT,
MEM_WP, MEM_WC,
MEM_UC , OWN,
PREFETCH
(CPUID model >=
2).
continued
Table B-1 Pentium 4 Processor Performance Metrics (continued)
Metric Description
Event Name or Metric
Expression Event Mask Value
Required