Intel ARCHITECTURE IA-32 - Manual (Page 474)

IA-32 Intel® Architecture Optimization
B-20
Mispredicted
returns The number of
mispredicted returns
including all causes. retired_mispred_
branch_type
RETURN
All conditionals The number of
branches that are
conditional jumps
(may overcount if the
branch is from build
mode or there is a
machine clear near
the branch) retired_branch_type CONDITIONAL
Mispredicted
indirect
branches All Mispredicted
returns and indirect
calls and indirect
jumps retired_mispred_
branch_type
INDIRECT
Mispredicted
calls All Mispredicted
indirect calls retired_branch_type CALL
Mispredicted
conditionals The number of
mispredicted
branches that are
conditional jumps retired_mispred_
branch_type
CONDITIONAL
Trace Cache (TC) and Front-End Metrics
Page Walk Miss
ITLB The number of page
walk requests due to
ITLB misses. page_walk_type ITMISS
ITLB Misses The number of ITLB
lookups that resulted
in a miss. Page Walk
Miss ITLB.is less
speculative than
ITLB Misses and is
the recommended
alternative. ITLB_reference MISS
continued
Table B-1 Pentium 4 Processor Performance Metrics (continued)
Metric Description
Event Name or Metric
Expression Event Mask Value
Required