SUPER MICRO Computer SUPERSERVER 6014L-T - Manual (Page 77)

Chapter 7: BIOS
7-9
Advanced Chipset Settings
This item allows the user to confi gure the Advanced Chipset settings for the sys-
tem.
NorthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel E7520 NorthBridge
chipset.
Memory Remap Feature
Select Enabled to allow remapping of the overlapped PCI memory above the
total physical memory. The options are Enabled and Disabled.
Memory Mirroring/Sparing
This feature allows the user to enable the function of Memory Mirroring and
Sparing if memory confi guration supports this function. The options are Dis-
abled and Sparing.
DMA Controller
This feature allows the user to enable or disable DMA Controller. The options
are Disabled and Enabled.
SouthBridge Confi guration
This feature allows the user to confi gure the settings for the Intel ICH SouthBridge
chipset.
CPU B.I.S.T. Enable
Select Enabled to enable the function of CPU Built In Self Test. The options are
Enabled and Disabled.
ICH Delayed Transaction
Select Disabled to set the South Bridge P2P Bridge Secondary Discard Timer
to 32 micro-seconds for the PCI 32-bit bus. Select Enabled to set the South
Bridge P2P Bridge Secondary Discard Timer to 4 micro-seconds for the PCI
32-bit bus.
ICH DCB
Select Enabled to activate the ICH DMA Collection Buffer to provide Type-F
DMA performance for all DMA channels, allowing the DMA controllers located
in the FPGA to move data between the CPU memory and the coprocessor. It
is ideal for systems whose CPU main memory can be directly accessed from
the FPGA.