Rockwell SoniCrafter BT8960 - Manual (Page 14)

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1.0 System Overview
1.1 Functional Summary
Bt8960
Single-Chip 2B1Q Transceiver
N8960DSB
1.1.4 Microcomputer Interface
The Microcomputer Interface (MCI) provides access to a 256-byte address space
within the transceiver. A combination of direct and indirect addressing methods
are used to access all internal locations. The MCI is designed to interface with
both Intel- and Motorola-style processors with no additional glue logic. A
MOTEL control pin is provided to configure the bus interface control/handshake
lines to conform to common Motorola/Intel conventions. A MUXED control pin
is provided to configure the bus interface address and data lines for multiplexed or
independent data/address bus operation. Little-endian data formatting (least sig-
nificant byte of a multibyte word stored at the lowest byte-address location) is
used in all cases, regardless of MOTEL pin selection. A READY control pin is
provided to support wait-state insertion. An Interrupt Request (IRQ) output pin
supports low-latency responses to time-critical events within the transceiver.
Eight 16-bit timers and ten measurement meters are integrated into the trans-
ceiver. The timers support various metering functions within the receiver section,
and off-load the external microcomputer from complex timing operations associ-
ated with startup procedures. Control and monitoring access to the timers and
meters is provided through the microcomputer interface.
1.1.5 Test and Diagnostic Interface (JTAG)
The test and diagnostic interface comprises a test access port and a Serial Monitor
Output (SMON). The test access port conforms to IEEE Std 1149.1-1990, (IEEE
Standard Test Access Port and Boundary Scan Architecture). Also referred to as
Joint Test Action Group (JTAG), this interface provides direct serial access to
each of the transceiver’s I/O pins. This capability can be used during an in-circuit
board test to increase the testability and reduce the cost of the in-circuit test pro-
cess.
The serial monitor output can be viewed as a real-time virtual probe for look-
ing at the transceiver’s internal signals. The programmable signal source is shifted
out serially at 16 times the symbol rate. The majority of the receive signal path is
accessible through this output.