Rockwell SoniCrafter BT8960 - Manual (Page 70)

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3.0 Registers
3.1 Conventions
Bt8960
Single-Chip 2B1Q Transceiver
N8960DSB
3.2.38 0x34, 0x35—SNR Alarm Threshold Register (snr_alarm_th_low,
snr_alarm_th_high)
A 2-byte read/write register interpreted as a 16-bit, 2’s-complement number. The range of meaningful values is
limited to positive integers between 0x0000 and 0x7FFF. The value of this register is compared to the value of
the SNR alarm meter. If the meter reading exceeds (greater than) this threshold, the low_snr interrupt flag is set
in the IRQ Source Register [irq_source; 0x05].
3.2.39 0x36, 0x37—Cursor Level Register (cursor_level_low, cursor_level_high)
A 2-byte read/write register interpreted as a 16-bit, 2’s-complement number. The range of meaningful values is
limited to positive integers between 0x0000 and 0x2AAA (one-third of the maximum positive value). The value
of this register represents the expected level of a noise-free +1 receive symbol at the output of the DFE. It is
multiplied by 2 to produce the positive and negative slicing levels, in addition to zero, used by the symbol detec-
tor in four-level slicing mode. This value is also used to scale the detector output when computing the equalizer
error and slicer error signals. The detected symbol (–3, –1, +1, +3) is multiplied by the value of this register to
produce the scaled output.
3.2.40 0x38, 0x39—DAGC Target Register (dagc_target_low, dagc_target_high)
A 2-byte read/write register interpreted as a 16-bit, 2’s-complement number. The range of meaningful values is
limited to positive integers between 0x0000 and 0x7FFF. The value of this register is subtracted from the abso-
lute value of the receive signal at the output of the DAGC function. The difference is used as the error input to
the DAGC while in the self-adaptation mode. In the DAGC’s equalizer-error adaptation mode, the contents of
this register are not used.