Err_rst_evnt_icsr), Section 5.24 – Texas Instruments TMS320C645X User Manual

Page 125

Advertising
background image

www.ti.com

5.24

Error, Reset, and Special Event Status Interrupt Register (ERR_RST_EVNT_ICSR)

SRIO Registers

Figure 80. Error, Reset, and Special Event Status Interrupt Register (ERR_RST_EVNT_ICSR)

31-17

16

Reserved

ICS16

R-0x00

R/W-

0x00

LEGEND: R = Read only; -n = value after reset

15-12

11

10

9

8

7-3

2

1

0

Reserved

ICS11

ICS10

ICS9

ICS8

Reserved

ICS2

ICS1

ICS0

R-0x00

R/W-

R/W-

R/W-

R/W-

R-0x00

R/W-

R/W-

R/W-

0x00

0x00

0x00

0x00

0x00

0x00

0x00

LEGEND: R = Read only; -n = value after reset

Table 54. Error, Reset, and Special Event Status Interrupt Register (ERR_RST_EVNT_ICSR) Field

Descriptions

Bit

Field

Value

Description

31-17

Reserved

Reserved

16

ICS16

Device Reset Interrupt from any port

15-12

Reserved

Reserved

11

ICS11

Port3 Error

10

ICS10

Port2 Error

9

ICS9

Port1 Error

8

ICS8

Port0 Error

7-3

Reserved

Reserved

2

ICS2

Logical Layer Error Management Event Capture

1

ICS1

Port-write-in request received on any port

0

ICS0

Multi-cast event control symbol interrupt received on any port

SPRU976 – March 2006

Serial RapidIO (SRIO)

125

Submit Documentation Feedback

Advertising