Section 5.72 – Texas Instruments TMS320C645X User Manual

Page 174

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5.72

Local Configuration Space Base Address 0 CSR (LCL_CFG_HBAR)

SRIO Registers

Figure 128. Local Configuration Space Base Address 0 CSR (LCL_CFG_HBAR)

31

30-16

Reserv

LCSBA

ed

R-

R-0x00

0x00

LEGEND: R = Read only; -n = value after reset

15-0

LCSBA

R-0x00

LEGEND: R = Read only; -n = value after reset

Table 102. Local Configuration Space Base Address 0 CSR (LCL_CFG_HBAR) Field Descriptions

Bit

Field

Value

Description

31

Reserved

Reserved

30-0

LCSBA

For bits 30 to 15: Reserved for 34b addresses, reserved for 50b addresses, bits 66-51 of a 66b
address.
For bits 14 to 0: Reserved for 34b addresses, bits 50-36 of a 50b address, bits 50-36 of a 66b
address.

Serial RapidIO (SRIO)

174

SPRU976 – March 2006

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