Texas Instruments TMS320C645X - Manual (Page 205)

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5.101 Port Error Rate CSR n (SPn_ERR_RATE)
SRIO Registers
Each of the four ports is supported by a register of this type.
Figure 157. Port Error Rate CSR n (SPn_ERR_RATE)
31-24 23-18 17-16
ERROR_RATE_BIAS Reserved ERROR_RATE
_RECOVERY
RW-0xFF R-0x00 RW-0x00
LEGEND: R = Read only; -n = value after reset
15-8 7-0
PEAK_ERROR_RATE ERROR_RATE_COUNTER
RW-0x00 RW-0x00
LEGEND: R = Read only; -n = value after reset
Table 131. Port Error Rate CSR n (SPn_ERR_RATE) Field Descriptions
Bit Field Value Description
31-24 ERROR_RATE_B These bits provide the error rate bias value.
IAS
0x00 Do not decrement the error rate counter
0x01 Decrement every 1ms (nominal)
0x03 Decrement every 10ms (nominal)
0x07 Decrement every 100ms
0x0F Decrement every 1s (nominal)
0x1F Decrement every 10s (nominal)
0x3F Decrement every 100s (nominal)
0x7F Decrement every 1000s (nominal)
0xFF Decrement every 10000s (nominal)
Other values are reserved
23-18 Reserved Reserved
17-16 ERROR_RATE_R These bits limit the incrementing of the error rate counter above the failed threshold trigger.
ECOVERY
00b Only count 2 errors above
01b Only count 4 errors above
10b Only count 16 errors above
11b Do not limit incrementing the error rate count
15-8 PEAK_ERROR_R This field contains the peak value attained by the error rate counter.
ATE
7-0 ERROR_RATE_C These bits maintain a count of the number of transmission errors that have occurred. If this value
OUNTER equals the value contained in the error rate threshold trigger register, then an error will be reported.
SPRU976 – March 2006 Serial RapidIO (SRIO) 205
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