Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 11)

Ethernet AVB Endpoint User Guide www.xilinx.com 11
UG492 September 21, 2010
Chapter 16: Detailed Example Design (EDK format)
Appendix A: RTC Time Stamp Accuracy
Figure A-1: RTC Periodic Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure A-2: RTC Sampling Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Figure A-3: Sampling Position Uncertainty . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Figure A-4: Overall Time Stamp Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171