Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 115)

Ethernet AVB Endpoint User Guide www.xilinx.com 115
UG492 September 21, 2010
Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACs
Connections Including Ethernet Statistics
Figure 12-2 illustrates the connection of the Ethernet AVB Endpoint core to the Xilinx Tri-
Mode Ethernet MAC (TEMAC) core when using the Ethernet Statistics core. This shares
much in common with
Figure 12-1 , but take note of the following additional points:
• All the “MAC Management Interface” output signals of the Ethernet AVB Endpoint
core connect directly to the signals of the same name at both the TEMAC and Ethernet
Statistics cores.
•
The Ethernet AVB Endpoint core provides two separate “MAC Management
Interface” inputs for management reads. This allows for logic-less connections
between all three cores as illustrated. To achieve this
♦ connect host_rd_data_mac[31:0] of the Ethernet AVB Endpoint core to the
host_rd_data[31:0]
port of the TEMAC.
♦ connect host_rd_data_stats[31:0] of the Ethernet AVB Endpoint core to
the host_rd_data[31:0] port of the Ethernet Statistics core.
X-Ref Target - Figure 12-2
Figure 12-2: Connection to the Tri-Mode Ethernet MAC and Ethernet Statistic Cores
tx_clk
tx_clk_en
tx_data[7:0]
rx_clk
rx_clk_en
rx_data[7:0]
rx_frame_good
rx_frame_bad
host_opcode[1:0]
host_addr[9:0]
host_wr_data[31:0]
host_req
host_miim_sel
host_miim_rdy
host_rd_data_mac[31:0]
host_rd_data_stats[31:0]
host_clk
pause_req
pause_val[15:0]
tx_clk
tx_clk_en
tx_data[7:0]
tx_data_valid
tx_underrun
tx_ack
tx_collision
tx_retransmit
tx_ifg_delay[7:0]
rx_clk
rx_clk_en
rx_data[7:0]
rx_frame_good
rx_data_valid
rx_frame_bad
host_opcode[1:0]
host_addr[9:0]
host_wr_data[31:0]
host_req
host_miim_sel
host_miim_rdy
host_rd_data[31:0]
host_clk
host_opcode[1:0]
host_addr[9:0]
host_req
host_miim_sel
host_miim_rdy
host_rd_data[31:0]
host_stats_lsw_rdy
host_stats_msw_rdy
host_clk
tx_statistics_valid
tx_statistics_vector[31:0]
rx_statistics_valid
rx_statistics_vector[27:0]
tx_clk
tx_clk_en
tx_statistics_valid
tx_statistics_vector[31:0]
rx_clk
rx_clk_en
rx_statistics_valid
rx_statistics_vector[27:0]
host_clk
GND
GND
NC
NC
TEMAC BLock-level Wrapper
(from TEMAC Example Design)
Ethernet AVB Endpoint
Core Netlist
host_stats_msw_rdy
host_stats_lsw_rdy
rx_data_valid
tx_data_valid
tx_underrun
tx_ack
Ethernet Statistics Block-level Wrapper
(from Ethernet Statistics Example Design)